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Fix add reserved's for HI3516CV610 reginfo
1 parent 1e3358a commit 300de84

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1 file changed

+53
-52
lines changed

1 file changed

+53
-52
lines changed

src/reginfo.c

Lines changed: 53 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -2140,58 +2140,59 @@ static const muxctrl_reg_t *RCV100regs[] = {
21402140
&RCV100_muxctrl_reg97, &RCV100_muxctrl_reg98, 0,
21412141
};
21422142

2143-
MUXCTRL(CV610_io0_cfg_reg0, 0x10260000, "GPIO0_0")
2144-
MUXCTRL(CV610_io0_cfg_reg1, 0x10260004, "GPIO0_1", "PWM0_OUT3", "BOOT_SEL1")
2145-
MUXCTRL(CV610_io0_cfg_reg2, 0x10260008, "WDG_RSTN")
2146-
MUXCTRL(CV610_io0_cfg_reg3, 0x1026000C, "GPIO2_3", "SFC_MOSI_IO0")
2147-
MUXCTRL(CV610_io0_cfg_reg4, 0x10260010, "GPIO2_2", "SFC_CLK", "BOOT_SEL0")
2148-
MUXCTRL(CV610_io0_cfg_reg5, 0x10260014, "GPIO2_6", "SFC_HOLD_IO3")
2149-
MUXCTRL(CV610_io0_cfg_reg6, 0x10260018, "GPIO2_1", "SFC_CSN0")
2150-
MUXCTRL(CV610_io0_cfg_reg7, 0x1026001C, "GPIO2_4", "SFC_MISO_IO1")
2151-
MUXCTRL(CV610_io0_cfg_reg8, 0x10260020, "GPIO2_5", "SFC_WP_IO2")
2152-
MUXCTRL(CV610_io0_cfg_reg10, 0x10260028, "GPIO3_5", "SDIO0_CARD_DETECT", "EMMC_RST_N", "SFC_CSN1", "PWM1_OUT0", "I2C2_SDA", "UART2_RXD")
2153-
MUXCTRL(CV610_io0_cfg_reg11, 0x1026002C, "GPIO3_6", "SDIO0_CDATA1/EMMC_DATA1", "SPI0_CSN1", "PWM1_OUT1", "I2C2_SCL", "UART2_TXD")
2154-
MUXCTRL(CV610_io0_cfg_reg12, 0x10260030, "GPIO3_7", "SDIO0_CDATA0/EMMC_DATA0", "SPI0_SCLK", "PWM1_OUT2", "SENSOR1_RSTN")
2155-
MUXCTRL(CV610_io0_cfg_reg13, 0x10260034, "GPIO4_0", "SDIO0_CCLK_OUT/EMMC_CLK_OUT", "TEST_MODE", "SPI0_SDO", "PWM1_OUT3", "I2S_MCLK")
2156-
MUXCTRL(CV610_io0_cfg_reg14, 0x10260038, "GPIO4_1", "SDIO0_CCMD/EMMC_CMD", "SPI0_SDI", "PWM1_OUT4", "I2S_BCLK", "UART1_RXD")
2157-
MUXCTRL(CV610_io0_cfg_reg15, 0x1026003C, "GPIO4_2", "SDIO0_CDATA3/EMMC_DATA3", "SPI0_CSN0", "PWM1_OUT5", "I2S_SD_TX", "UART1_TXD")
2158-
MUXCTRL(CV610_io0_cfg_reg16, 0x10260040, "GPIO4_3", "SDIO0_CDATA2/EMMC_DATA2", "UART2_RXD", "PWM1_OUT6", "I2S_WS", "UART1_RTSN")
2159-
MUXCTRL(CV610_io0_cfg_reg17, 0x10260044, "GPIO3_4", "SDIO0_CARD_POWER_EN_N", "UART2_TXD", "PWM1_OUT7", "I2S_SD_RX", "UART1_CTSN")
2160-
MUXCTRL(CV610_io2_cfg_reg0, 0x17940000, "MIPI_RX_CK1N", "GPIO5_6", "VI_BT1120_DATA8", "VI_DATA11", "I2C0_SDA", "PWM0_OUT1")
2161-
MUXCTRL(CV610_io2_cfg_reg1, 0x17940004, "MIPI_RX_CK1P", "GPIO5_7", "VI_BT1120_DATA9", "VI_DATA10", "I2C0_SCL", "PWM0_OUT2")
2162-
MUXCTRL(CV610_io2_cfg_reg2, 0x17940008, "MIPI_RX_D3N", "GPIO6_2", "VI_BT1120_DATA10", "VI_DATA9", "SENSOR0_RSTN")
2163-
MUXCTRL(CV610_io2_cfg_reg3, 0x1794000C, "MIPI_RX_D3P", "GPIO6_3", "VI_BT1120_DATA11", "VI_DATA8", "PWM0_OUT1")
2164-
MUXCTRL(CV610_io2_cfg_reg4, 0x17940010, "MIPI_RX_D1N", "GPIO6_0", "VI_BT1120_DATA12", "VI_CLK", "PWM0_OUT2")
2165-
MUXCTRL(CV610_io2_cfg_reg5, 0x17940014, "MIPI_RX_D1P", "GPIO6_1", "VI_BT1120_DATA13", "VI_DATA7", "PWM0_OUT3")
2166-
MUXCTRL(CV610_io2_cfg_reg6, 0x17940018, "MIPI_RX_CK0N", "GPIO5_0", "VI_BT1120_DATA0", "VI_DATA5", "VI_CLK", "I2C0_SDA")
2167-
MUXCTRL(CV610_io2_cfg_reg7, 0x1794001C, "MIPI_RX_CK0P", "GPIO5_1", "VI_BT1120_DATA1", "VI_DATA6", "VI_DATA7", "I2C0_SCL")
2168-
MUXCTRL(CV610_io2_cfg_reg8, 0x17940020, "MIPI_RX_D0N", "GPIO5_2", "VI_BT1120_DATA2", "VI_DATA4", "SENSOR0_RSTN")
2169-
MUXCTRL(CV610_io2_cfg_reg9, 0x17940024, "MIPI_RX_D0P", "GPIO5_3", "VI_BT1120_DATA3", "VI_DATA3", "VI_DATA5", "PWM0_OUT1")
2170-
MUXCTRL(CV610_io2_cfg_reg10, 0x17940028, "MIPI_RX_D2N", "GPIO5_4", "VI_BT1120_DATA4", "VI_DATA2", "VI_DATA6", "PWM0_OUT2")
2171-
MUXCTRL(CV610_io2_cfg_reg11, 0x1794002C, "MIPI_RX_D2P", "GPIO5_5", "VI_BT1120_DATA5", "VI_DATA1", "VI_DATA3", "PWM0_OUT3")
2172-
MUXCTRL(CV610_io2_cfg_reg32, 0x17940080, "GPIO6_5", "SENSOR1_CLK", "FAST_BOOT_MODE", "SENSOR0_RSTN")
2173-
MUXCTRL(CV610_io2_cfg_reg33, 0x17940084, "TEST_CLK", "SENSOR0_CLK", "GPIO6_4", "SFC_EMMC_BOOT_MODE")
2174-
MUXCTRL(CV610_io2_cfg_reg34, 0x17940088, "GPIO7_3", "VI_BT1120_DATA6", "PWM0_OUT1", "SENSOR1_RSTN", "VI_DATA0")
2175-
MUXCTRL(CV610_io2_cfg_reg35, 0x1794008C, "GPIO7_2", "VI_BT1120_DATA7", "PWM0_OUT2", "SENSOR0_RSTN", "VI_VS")
2176-
MUXCTRL(CV610_io2_cfg_reg36, 0x17940090, "GPIO7_0", "VI_BT1120_CLK", "SPI0_CSN0", "I2C1_SDA", "VI_HS", "SENSOR0_HS")
2177-
MUXCTRL(CV610_io2_cfg_reg37, 0x17940094, "GPIO7_1", "VI_BT1120_DATA14", "SPI0_SDI", "SENSOR0_RSTN", "I2C1_SCL", "SENSOR0_VS")
2178-
MUXCTRL(CV610_io2_cfg_reg38, 0x17940098, "GPIO6_6", "VI_BT1120_DATA15", "ETH_LINK_STA_LED", "SPI0_SDO", "ETH_STA_ACT_LED", "I2C0_SDA", "VI_DATA1", "SENSOR1_HS")
2179-
MUXCTRL(CV610_io2_cfg_reg39, 0x1794009C, "GPIO6_7", "ETH_LINK_ACT_LED", "SPI0_SCLK", "I2C0_SCL", "VI_DATA2", "SENSOR1_VS")
2180-
MUXCTRL(CV610_io1_cfg_reg0, 0x11130000, "GPIO1_5", "I2C1_SDA", "PWM0_OUT2", "UART2_RXD", "LSADC_CH1")
2181-
MUXCTRL(CV610_io1_cfg_reg1, 0x11130004, "GPIO1_4", "I2C1_SCL", "PWM0_OUT3", "UART2_TXD", "LSADC_CH0")
2182-
MUXCTRL(CV610_io1_cfg_reg12, 0x11130030, "JTAG_TRSTN", "ETH_LINK_STA_LED", "GPIO0_6", "I2C0_SCL", "UART1_RXD", "SPI0_CSN1", "PWM0_OUT1")
2183-
MUXCTRL(CV610_io1_cfg_reg13, 0x11130034, "JTAG_TDI", "ETH_LINK_ACT_LED", "ETH_STA_ACT_LED", "I2C0_SDA", "USB2_PWREN", "UART1_TXD", "GPIO0_7", "PWM0_OUT2")
2184-
MUXCTRL(CV610_io1_cfg_reg14, 0x11130038, "GPIO7_7", "SDIO1_CDATA2", "I2S_MCLK", "UART1_RTSN", "SPI1_SDO", "PWM1_OUT0")
2185-
MUXCTRL(CV610_io1_cfg_reg15, 0x1113003C, "GPIO1_0", "SDIO1_CDATA3", "I2S_SD_TX", "UART1_CTSN", "SPI1_SDI", "PWM1_OUT1")
2186-
MUXCTRL(CV610_io1_cfg_reg16, 0x11130040, "GPIO1_2", "SDIO1_CCMD", "I2S_BCLK", "SENSOR1_RSTN", "SPI1_CSN", "PWM1_OUT2")
2187-
MUXCTRL(CV610_io1_cfg_reg17, 0x11130044, "JTAG_TCK", "SDIO1_CCLK_OUT", "GPIO1_3", "I2S_WS", "SPI1_SCLK", "PWM1_OUT3")
2188-
MUXCTRL(CV610_io1_cfg_reg18, 0x11130048, "GPIO1_1", "SDIO1_CDATA0", "I2S_SD_RX", "UART2_RXD", "SPI0_SDO", "PWM1_OUT4")
2189-
MUXCTRL(CV610_io1_cfg_reg19, 0x1113004C, "GPIO7_6", "SDIO1_CDATA1", "UART2_TXD", "SPI0_SDI", "PWM1_OUT5")
2190-
MUXCTRL(CV610_io1_cfg_reg20, 0x11130050, "JTAG_TMS", "SDIO1_CARD_DETECT", "SENSOR1_RSTN", "I2C2_SDA", "GPIO7_5", "SPI0_SCLK", "PWM1_OUT6")
2191-
MUXCTRL(CV610_io1_cfg_reg21, 0x11130054, "JTAG_TDO", "SDIO1_CARD_POWER_EN_N", "I2C2_SCL", "GPIO7_4", "SPI0_CSN0", "PWM1_OUT7")
2192-
MUXCTRL(CV610_io1_cfg_reg22, 0x11130058, "GPIO0_2", "UART0_RXD")
2193-
MUXCTRL(CV610_io1_cfg_reg23, 0x1113005C, "GPIO0_3", "UART0_TXD")
2194-
MUXCTRL(CV610_io1_cfg_reg26, 0x11130068, "GPIO2_0", "SVB_PWM")
2143+
MUXCTRL(CV610_io0_cfg_reg0, 0x10260000, "GPIO0_0");
2144+
MUXCTRL(CV610_io0_cfg_reg1, 0x10260004, "GPIO0_1", "PWM0_OUT3", "BOOT_SEL1");
2145+
MUXCTRL(CV610_io0_cfg_reg2, 0x10260008, "WDG_RSTN");
2146+
MUXCTRL(CV610_io0_cfg_reg3, 0x1026000C, "GPIO2_3", "SFC_MOSI_IO0");
2147+
MUXCTRL(CV610_io0_cfg_reg4, 0x10260010, "GPIO2_2", "SFC_CLK", "reserved", "reserved", "BOOT_SEL0");
2148+
MUXCTRL(CV610_io0_cfg_reg5, 0x10260014, "GPIO2_6", "SFC_HOLD_IO3");
2149+
MUXCTRL(CV610_io0_cfg_reg6, 0x10260018, "GPIO2_1", "SFC_CSN0");
2150+
MUXCTRL(CV610_io0_cfg_reg7, 0x1026001C, "GPIO2_4", "SFC_MISO_IO1");
2151+
MUXCTRL(CV610_io0_cfg_reg8, 0x10260020, "GPIO2_5", "SFC_WP_IO2");
2152+
MUXCTRL(CV610_io0_cfg_reg10, 0x10260028, "GPIO3_5", "SDIO0_CARD_DETECT", "EMMC_RST_N", "SFC_CSN1", "reserved", "PWM1_OUT0", "I2C2_SDA", "UART2_RXD");
2153+
MUXCTRL(CV610_io0_cfg_reg11, 0x1026002C, "GPIO3_6", "SDIO0_CDATA1/EMMC_DATA1", "reserved", "reserved", "SPI0_CSN1", "PWM1_OUT1", "I2C2_SCL", "UART2_TXD");
2154+
MUXCTRL(CV610_io0_cfg_reg12, 0x10260030, "GPIO3_7", "SDIO0_CDATA0/EMMC_DATA0", "reserved", "reserved", "SPI0_SCLK", "PWM1_OUT2", "reserved", "SENSOR1_RSTN");
2155+
MUXCTRL(CV610_io0_cfg_reg13, 0x10260034, "GPIO4_0", "SDIO0_CCLK_OUT/EMMC_CLK_OUT", "TEST_MODE", "reserved", "SPI0_SDO", "PWM1_OUT3", "I2S_MCLK");
2156+
MUXCTRL(CV610_io0_cfg_reg14, 0x10260038, "GPIO4_1", "SDIO0_CCMD/EMMC_CMD", "reserved", "reserved", "SPI0_SDI", "PWM1_OUT4", "I2S_BCLK", "UART1_RXD");
2157+
MUXCTRL(CV610_io0_cfg_reg15, 0x1026003C, "GPIO4_2", "SDIO0_CDATA3/EMMC_DATA3", "reserved", "reserved", "SPI0_CSN0", "PWM1_OUT5", "I2S_SD_TX", "UART1_TXD");
2158+
MUXCTRL(CV610_io0_cfg_reg16, 0x10260040, "GPIO4_3", "SDIO0_CDATA2/EMMC_DATA2", "reserved", "reserved", "UART2_RXD", "PWM1_OUT6", "I2S_WS", "UART1_RTSN");
2159+
MUXCTRL(CV610_io0_cfg_reg17, 0x10260044, "GPIO3_4", "SDIO0_CARD_POWER_EN_N", "reserved", "reserved", "UART2_TXD", "PWM1_OUT7", "I2S_SD_RX", "UART1_CTSN");
2160+
MUXCTRL(CV610_io2_cfg_reg0, 0x17940000, "MIPI_RX_CK1N", "GPIO5_6", "VI_BT1120_DATA8", "VI_DATA11", "I2C0_SDA", "reserved", "reserved", "PWM0_OUT1");
2161+
MUXCTRL(CV610_io2_cfg_reg1, 0x17940004, "MIPI_RX_CK1P", "GPIO5_7", "VI_BT1120_DATA9", "VI_DATA10", "I2C0_SCL", "reserved", "reserved", "PWM0_OUT2");
2162+
MUXCTRL(CV610_io2_cfg_reg2, 0x17940008, "MIPI_RX_D3N", "GPIO6_2", "VI_BT1120_DATA10", "VI_DATA9", "reserved", "reserved", "reserved", "SENSOR0_RSTN");
2163+
MUXCTRL(CV610_io2_cfg_reg3, 0x1794000C, "MIPI_RX_D3P", "GPIO6_3", "VI_BT1120_DATA11", "VI_DATA8", "reserved", "reserved", "reserved", "PWM0_OUT1");
2164+
MUXCTRL(CV610_io2_cfg_reg4, 0x17940010, "MIPI_RX_D1N", "GPIO6_0", "VI_BT1120_DATA12", "VI_CLK", "reserved", "reserved", "reserved", "PWM0_OUT2");
2165+
MUXCTRL(CV610_io2_cfg_reg5, 0x17940014, "MIPI_RX_D1P", "GPIO6_1", "VI_BT1120_DATA13", "VI_DATA7", "reserved", "reserved", "reserved", "PWM0_OUT3");
2166+
MUXCTRL(CV610_io2_cfg_reg6, 0x17940018, "MIPI_RX_CK0N", "GPIO5_0", "VI_BT1120_DATA0", "VI_DATA5", "reserved", "reserved", "VI_CLK", "I2C0_SDA");
2167+
MUXCTRL(CV610_io2_cfg_reg7, 0x1794001C, "MIPI_RX_CK0P", "GPIO5_1", "VI_BT1120_DATA1", "VI_DATA6", "reserved", "reserved", "VI_DATA7", "I2C0_SCL");
2168+
MUXCTRL(CV610_io2_cfg_reg8, 0x17940020, "MIPI_RX_D0N", "GPIO5_2", "VI_BT1120_DATA2", "VI_DATA4", "reserved", "reserved", "reserved", "SENSOR0_RSTN");
2169+
MUXCTRL(CV610_io2_cfg_reg9, 0x17940024, "MIPI_RX_D0P", "GPIO5_3", "VI_BT1120_DATA3", "VI_DATA3", "reserved", "reserved", "VI_DATA5", "PWM0_OUT1");
2170+
MUXCTRL(CV610_io2_cfg_reg10, 0x17940028, "MIPI_RX_D2N", "GPIO5_4", "VI_BT1120_DATA4", "VI_DATA2", "reserved", "reserved", "VI_DATA6", "PWM0_OUT2");
2171+
MUXCTRL(CV610_io2_cfg_reg11, 0x1794002C, "MIPI_RX_D2P", "GPIO5_5", "VI_BT1120_DATA5", "VI_DATA1", "reserved", "reserved", "VI_DATA3", "PWM0_OUT3");
2172+
MUXCTRL(CV610_io2_cfg_reg32, 0x17940080, "GPIO6_5", "SENSOR1_CLK", "reserved", "reserved", "reserved", "FAST_BOOT_MODE", "reserved", "SENSOR0_RSTN");
2173+
MUXCTRL(CV610_io2_cfg_reg33, 0x17940084, "TEST_CLK", "SENSOR0_CLK", "reserved", "GPIO6_4", "reserved", "SFC_EMMC_BOOT_MODE");
2174+
MUXCTRL(CV610_io2_cfg_reg34, 0x17940088, "GPIO7_3", "VI_BT1120_DATA6", "reserved", "reserved", "PWM0_OUT1", "SENSOR1_RSTN", "VI_DATA0");
2175+
MUXCTRL(CV610_io2_cfg_reg35, 0x1794008C, "GPIO7_2", "VI_BT1120_DATA7", "reserved", "reserved", "PWM0_OUT2", "SENSOR0_RSTN", "VI_VS");
2176+
MUXCTRL(CV610_io2_cfg_reg36, 0x17940090, "GPIO7_0", "VI_BT1120_CLK", "reserved", "SPI0_CSN0", "reserved", "I2C1_SDA", "VI_HS", "SENSOR0_HS");
2177+
MUXCTRL(CV610_io2_cfg_reg37, 0x17940094, "GPIO7_1", "VI_BT1120_DATA14", "reserved", "SPI0_SDI", "SENSOR0_RSTN", "I2C1_SCL", "reserved", "SENSOR0_VS");
2178+
MUXCTRL(CV610_io2_cfg_reg38, 0x17940098, "GPIO6_6", "VI_BT1120_DATA15", "ETH_LINK_STA_LED", "SPI0_SDO", "ETH_STA_ACT_LED", "I2C0_SDA", "VI_DATA1", "SENSOR1_HS");
2179+
MUXCTRL(CV610_io2_cfg_reg39, 0x1794009C, "GPIO6_7", "reserved", "ETH_LINK_ACT_LED", "SPI0_SCLK", "reserved", "I2C0_SCL", "VI_DATA2", "SENSOR1_VS");
2180+
MUXCTRL(CV610_io1_cfg_reg0, 0x11130000, "GPIO1_5", "I2C1_SDA", "PWM0_OUT2", "UART2_RXD", "LSADC_CH1");
2181+
MUXCTRL(CV610_io1_cfg_reg1, 0x11130004, "GPIO1_4", "I2C1_SCL", "PWM0_OUT3", "UART2_TXD", "LSADC_CH0");
2182+
MUXCTRL(CV610_io1_cfg_reg12, 0x11130030, "JTAG_TRSTN", "ETH_LINK_STA_LED", "GPIO0_6", "I2C0_SCL", "reserved", "UART1_RXD", "SPI0_CSN1", "PWM0_OUT1");
2183+
MUXCTRL(CV610_io1_cfg_reg13, 0x11130034, "JTAG_TDI", "ETH_LINK_ACT_LED", "ETH_STA_ACT_LED", "I2C0_SDA", "USB2_PWREN", "UART1_TXD", "GPIO0_7", "PWM0_OUT2");
2184+
MUXCTRL(CV610_io1_cfg_reg14, 0x11130038, "GPIO7_7", "SDIO1_CDATA2", "reserved", "I2S_MCLK", "reserved", "UART1_RTSN", "SPI1_SDO", "PWM1_OUT0");
2185+
MUXCTRL(CV610_io1_cfg_reg15, 0x1113003C, "GPIO1_0", "SDIO1_CDATA3", "reserved", "I2S_SD_TX", "reserved", "UART1_CTSN", "SPI1_SDI", "PWM1_OUT1");
2186+
MUXCTRL(CV610_io1_cfg_reg16, 0x11130040, "GPIO1_2", "SDIO1_CCMD", "reserved", "I2S_BCLK", "reserved", "SENSOR1_RSTN", "SPI1_CSN", "PWM1_OUT2");
2187+
MUXCTRL(CV610_io1_cfg_reg17, 0x11130044, "JTAG_TCK", "SDIO1_CCLK_OUT", "GPIO1_3", "I2S_WS", "reserved", "reserved", "SPI1_SCLK", "PWM1_OUT3");
2188+
MUXCTRL(CV610_io1_cfg_reg18, 0x11130048, "GPIO1_1", "SDIO1_CDATA0", "reserved", "I2S_SD_RX", "reserved", "UART2_RXD", "SPI0_SDO", "PWM1_OUT4");
2189+
MUXCTRL(CV610_io1_cfg_reg19, 0x1113004C, "GPIO7_6", "SDIO1_CDATA1", "reserved", "reserved", "reserved", "UART2_TXD", "SPI0_SDI", "PWM1_OUT5");
2190+
MUXCTRL(CV610_io1_cfg_reg20, 0x11130050, "JTAG_TMS", "SDIO1_CARD_DETECT", "SENSOR1_RSTN", "I2C2_SDA", "reserved", "GPIO7_5", "SPI0_SCLK", "PWM1_OUT6");
2191+
MUXCTRL(CV610_io1_cfg_reg21, 0x11130054, "JTAG_TDO", "SDIO1_CARD_POWER_EN_N", "reserved", "I2C2_SCL", "reserved", "GPIO7_4", "SPI0_CSN0", "PWM1_OUT7");
2192+
MUXCTRL(CV610_io1_cfg_reg22, 0x11130058, "GPIO0_2", "UART0_RXD");
2193+
MUXCTRL(CV610_io1_cfg_reg23, 0x1113005C, "GPIO0_3", "UART0_TXD");
2194+
MUXCTRL(CV610_io1_cfg_reg26, 0x11130068, "GPIO2_0", "SVB_PWM");
2195+
21952196

21962197
static const muxctrl_reg_t *CV610regs[] = {
21972198
&CV610_io0_cfg_reg0,

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