Audio: MFCC: Fix build of component for current SOF

app/boards/intel_adsp_ace15_mtpm.conf

@@ -8,6 +8,7 @@ CONFIG_COMP_SRC_LITE=y
 CONFIG_COMP_DRC=m
 CONFIG_COMP_CROSSOVER=y
 CONFIG_COMP_MULTIBAND_DRC=y
+CONFIG_COMP_MFCC=y
 
 # power settings
 CONFIG_PM=y

app/boards/intel_adsp_cavs25.conf

@@ -32,6 +32,7 @@ CONFIG_COMP_DRC=y
 CONFIG_COMP_CROSSOVER=y
 CONFIG_COMP_MULTIBAND_DRC=y
 CONFIG_COMP_ARIA=y
+CONFIG_COMP_MFCC=y
 
 # route SOF logs to Zephyr logging subsystem
 CONFIG_SOF_LOG_LEVEL_INF=y

app/boards/intel_adsp_cavs25_tgph.conf

@@ -31,6 +31,7 @@ CONFIG_COMP_DRC=y
 CONFIG_COMP_CROSSOVER=y
 CONFIG_COMP_MULTIBAND_DRC=y
 CONFIG_COMP_ARIA=y
+CONFIG_COMP_MFCC=y
 
 # route SOF logs to Zephyr logging subsystem
 CONFIG_SOF_LOG_LEVEL_INF=y

src/audio/mfcc/mfcc.c

@@ -26,6 +26,7 @@
 #include <ipc/topology.h>
 #include <user/mfcc.h>
 #include <user/trace.h>
+#include <rtos/init.h>
 #include <rtos/string.h>
 #include <errno.h>
 #include <stdbool.h>
@@ -257,3 +258,4 @@ static const struct module_interface mfcc_interface = {
 };
 
 DECLARE_MODULE_ADAPTER(mfcc_interface, mfcc_uuid, mfcc_tr);
+SOF_MODULE_INIT(mfcc, sys_comp_module_mfcc_interface_init);

src/audio/mfcc/mfcc.toml

@@ -0,0 +1,21 @@
+#ifndef LOAD_TYPE
+#define LOAD_TYPE "0"
+#endif
+
+REM # MFCC module config
+[[module.entry]]
+name = "MFCC"
+uuid = "DB10A773-1AA4-4CEA-A21F-2D57A5C982EB"
+affinity_mask = "0x1"
+instance_count = "40"
+domain_types = "0"
+load_type = LOAD_TYPE
+module_type = "9"
+auto_start = "0"
+sched_caps = [1, 0x00008000]
+REM # pin = [dir, type, sample rate, size, container, channel-cfg]
+pin = [0, 0, 0xfeef, 0xf, 0xf, 0x45ff, 1, 0, 0xfeef, 0xf, 0xf, 0x1ff]
+REM # mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
+mod_cfg = [0, 0, 0, 0, 4096, 1000000, 128, 128, 0, 0, 0]
+
+index = __COUNTER__

src/include/sof/audio/mfcc/mfcc_comp.h

@@ -50,9 +50,6 @@
 #endif
 #define MFCC_NORMALIZE_MAX_SHIFT	10
 
-struct audio_stream;
-struct comp_dev;
-
 /** \brief Type definition for processing function select return value. */
 typedef void (*mfcc_func)(struct processing_module *mod,
 			  struct input_stream_buffer *bsource,
@@ -189,7 +186,7 @@ void mfcc_s16_default(struct processing_module *mod, struct input_stream_buffer
 #endif
 
 #ifdef UNIT_TEST
-void sys_comp_mfcc_init(void);
+void sys_comp_module_mfcc_interface_init(void);
 #endif
 
 #endif /* __SOF_AUDIO_MFCC_MFCC_COMP_H__ */

tools/rimage/config/tgl-h.toml

@@ -60,7 +60,7 @@ name = "ADSPFW"
 load_offset = "0x30000"
 
 [module]
-count = 24
+count = 25
 	[[module.entry]]
 	name = "BRNGUP"
 	uuid = "61EB0CB9-34D8-4F59-A21D-04C54C21D3A4"
@@ -546,3 +546,19 @@ count = 24
 	pin = [0, 0, 0xfeef, 0xf, 0xf, 0x45ff, 1, 0, 0xfeef, 0xf, 0xf, 0x1ff]
 	# mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
 	mod_cfg = [0, 0, 0, 0, 4096, 1000000, 128, 128, 0, 0, 0]
+
+	# MFCC module config
+	[[module.entry]]
+	name = "MFCC"
+	uuid = "DB10A773-1AA4-4CEA-A21F-2D57A5C982EB"
+	affinity_mask = "0x1"
+	instance_count = "40"
+	domain_types = "0"
+	load_type = "0"
+	module_type = "9"
+	auto_start = "0"
+	sched_caps = [1, 0x00008000]
+	# pin = [dir, type, sample rate, size, container, channel-cfg]
+	pin = [0, 0, 0xfeef, 0xf, 0xf, 0x45ff, 1, 0, 0xfeef, 0xf, 0xf, 0x1ff]
+	# mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
+	mod_cfg = [0, 0, 0, 0, 4096, 1000000, 128, 128, 0, 0, 0]

tools/rimage/config/tgl.toml

@@ -60,7 +60,7 @@ name = "ADSPFW"
 load_offset = "0x30000"
 
 [module]
-count = 24
+count = 25
 	[[module.entry]]
 	name = "BRNGUP"
 	uuid = "61EB0CB9-34D8-4F59-A21D-04C54C21D3A4"
@@ -546,3 +546,19 @@ count = 24
 	pin = [0, 0, 0xfeef, 0xf, 0xf, 0x45ff, 1, 0, 0xfeef, 0xf, 0xf, 0x1ff]
 	# mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
 	mod_cfg = [0, 0, 0, 0, 4096, 1000000, 128, 128, 0, 0, 0]
+
+	# MFCC module config
+	[[module.entry]]
+	name = "MFCC"
+	uuid = "DB10A773-1AA4-4CEA-A21F-2D57A5C982EB"
+	affinity_mask = "0x1"
+	instance_count = "40"
+	domain_types = "0"
+	load_type = "0"
+	module_type = "9"
+	auto_start = "0"
+	sched_caps = [1, 0x00008000]
+	# pin = [dir, type, sample rate, size, container, channel-cfg]
+	pin = [0, 0, 0xfeef, 0xf, 0xf, 0x45ff, 1, 0, 0xfeef, 0xf, 0xf, 0x1ff]
+	# mod_cfg [PAR_0 PAR_1 PAR_2 PAR_3 IS_BYTES CPS IBS OBS MOD_FLAGS CPC OBLS]
+	mod_cfg = [0, 0, 0, 0, 4096, 1000000, 128, 128, 0, 0, 0]

tools/topology/topology2/development/tplg-targets.cmake

@@ -234,6 +234,28 @@ PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-tgl-nocodec-crossover.bin,EFX_CROSSOVE
 "development/cavs-nocodec-rtcaec\;sof-tgl-nocodec-rtcaec\;PLATFORM=tgl,\
 PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-tgl-nocodec-rtcaec.bin"
 
+# Add MFCC to 16 kHz DMIC1, 2ch with NHLT - cAVS
+"sof-hda-generic\;sof-hda-generic-cavs25-2ch-mfcc\;HDA_CONFIG=mix,\
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-hda-generic-cavs25-2ch-mfcc.bin,\
+NUM_DMICS=2,DMIC1_RATE=16000,DMIC1_ENABLE=MFCC,DMIC1_MFCC_PARAMS=default"
+
+# Add MFCC to 16 kHz DMIC1, 2ch with NHLT - ACE1
+"sof-hda-generic\;sof-hda-generic-ace1-2ch-mfcc\;PLATFORM=mtl,HDA_CONFIG=mix,\
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-hda-generic-ace1-2ch-mfcc.bin,\
+NUM_DMICS=2,DMIC1_RATE=16000,DMIC1_ENABLE=MFCC,DMIC1_MFCC_PARAMS=default"
+
+# Add MFCC to 16 kHz DMIC1, 4ch with NHLT - cAVS
+"sof-hda-generic\;sof-hda-generic-cavs25-4ch-mfcc\;HDA_CONFIG=mix,\
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-hda-generic-cavs25-4ch-mfcc.bin,\
+NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,DMIC1_RATE=16000,\
+DMIC1_ENABLE=MFCC,DMIC1_MFCC_PARAMS=default"
+
+# Add MFCC to 16 kHz DMIC1, 4ch with NHLT - ACE1
+"sof-hda-generic\;sof-hda-generic-ace1-4ch-mfcc\;PLATFORM=mtl,HDA_CONFIG=mix,\
+PREPROCESS_PLUGINS=nhlt,NHLT_BIN=nhlt-sof-hda-generic-ace1-4ch-mfcc.bin,\
+NUM_DMICS=4,PDM1_MIC_A_ENABLE=1,PDM1_MIC_B_ENABLE=1,DMIC1_RATE=16000,\
+DMIC1_ENABLE=MFCC,DMIC1_MFCC_PARAMS=default"
+
 # Topology for SOF plugin
 "development/sof-plugin\;sof-plugin\;NOISE_SUPPRESSION=false"
 

tools/topology/topology2/include/components/eqiir/highpass_100hz_0db_16khz.conf

@@ -0,0 +1,19 @@
+# 100 Hz second order high-pass, gain 0 dB, created with sof_example_iir_eq.m 03-Jun-2024
+Object.Base.data."iir_eq" {
+	bytes "
+		0x53,0x4f,0x46,0x34,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x00,0xa0,0x01,0x03,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x02,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0xf5,0x18,0x75,0xc3,
+		0x6b,0x52,0x72,0x7c,0x6e,0x92,0x32,0x1f,
+		0x24,0xdb,0x9a,0xc1,0x6e,0x92,0x32,0x1f,
+		0x00,0x00,0x00,0x00,0xb4,0x7f,0x00,0x00"
+}

tools/topology/topology2/include/components/eqiir/highpass_100hz_0db_48khz.conf

@@ -0,0 +1,19 @@
+# 100 Hz second order high-pass, gain 0 dB, created with sof_example_iir_eq.m 03-Jun-2024
+Object.Base.data."iir_eq" {
+	bytes "
+		0x53,0x4f,0x46,0x34,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x00,0xa0,0x01,0x03,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x02,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0xbd,0x82,0x2c,0xc1,
+		0x2e,0xb5,0xd0,0x7e,0x0c,0xcc,0xc7,0x1f,
+		0xe9,0x67,0x70,0xc0,0x0c,0xcc,0xc7,0x1f,
+		0x00,0x00,0x00,0x00,0xb4,0x7f,0x00,0x00"
+}

tools/topology/topology2/include/components/eqiir/highpass_100hz_20db_16khz.conf

@@ -0,0 +1,19 @@
+# 100 Hz second order high-pass, gain 20 dB, created with sof_example_iir_eq.m 03-Jun-2024
+Object.Base.data."iir_eq" {
+	bytes "
+		0x53,0x4f,0x46,0x34,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x00,0xa0,0x01,0x03,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x02,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0xf5,0x18,0x75,0xc3,
+		0x6b,0x52,0x72,0x7c,0x6e,0x92,0x32,0x1f,
+		0x24,0xdb,0x9a,0xc1,0x6e,0x92,0x32,0x1f,
+		0xfc,0xff,0xff,0xff,0xd0,0x4f,0x00,0x00"
+}

tools/topology/topology2/include/components/eqiir/highpass_100hz_20db_48khz.conf

@@ -0,0 +1,19 @@
+# 100 Hz second order high-pass, gain 20 dB, created with sof_example_iir_eq.m 03-Jun-2024
+Object.Base.data."iir_eq" {
+	bytes "
+		0x53,0x4f,0x46,0x34,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x00,0xa0,0x01,0x03,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x58,0x00,0x00,0x00,0x02,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0xbd,0x82,0x2c,0xc1,
+		0x2e,0xb5,0xd0,0x7e,0x0c,0xcc,0xc7,0x1f,
+		0xe9,0x67,0x70,0xc0,0x0c,0xcc,0xc7,0x1f,
+		0xfc,0xff,0xff,0xff,0xd1,0x4f,0x00,0x00"
+}

tools/topology/topology2/include/components/mfcc.conf

@@ -0,0 +1,64 @@
+#
+#
+# A MFCC component for SOF. All attributes defined herein are namespaced
+# by alsatplg to "Object.Widget.mfcc.attribute_name"
+#
+# Usage: this component can be used by declaring in the parent object. i.e.
+#
+# Object.Widget.mfcc."N" {
+#		index			1
+#	}
+# }
+
+#
+# Where M is pipeline ID and N is a unique integer in the parent object.
+
+Class.Widget."mfcc" {
+	#
+	# Pipeline ID
+	#
+	DefineAttribute."index" {
+		type "integer"
+	}
+
+	#
+	# Unique instance for MFCC widget
+	#
+	DefineAttribute."instance" {
+		type "integer"
+	}
+
+	# Include common widget attributes definition
+	<include/components/widget-common.conf>
+
+	attributes {
+		!constructor [
+			"index"
+			"instance"
+		]
+		!mandatory [
+			"num_input_pins"
+			"num_output_pins"
+			"num_input_audio_formats"
+			"num_output_audio_formats"
+		]
+
+		!immutable [
+			"uuid"
+			"type"
+		]
+		!deprecated [
+			"preload_count"
+		]
+		unique	"instance"
+	}
+
+	#
+	# Default attributes for mfcc
+	#
+	uuid			"73:a7:10:db:a4:1a:ea:4c:a2:1f:2d:57:a5:c9:82:eb"
+	type			"effect"
+	no_pm			"true"
+	num_input_pins		1
+	num_output_pins		1
+}

tools/topology/topology2/include/components/mfcc/default.conf

@@ -0,0 +1,22 @@
+# Exported MFCC configuration 24-Jul-2024
+# cd tools/tune/mfcc; octave setup_mfcc.m
+Object.Base.data."mfcc_config" {
+	bytes "
+		0x53,0x4f,0x46,0x34,0x00,0x00,0x00,0x00,
+		0x68,0x00,0x00,0x00,0x00,0xa0,0x01,0x03,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x68,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x80,0x3e,0x00,0x00,
+		0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+		0x02,0x00,0x00,0x00,0x01,0x00,0x00,0x00,
+		0xc3,0x35,0x00,0x2c,0xff,0xff,0x00,0x00,
+		0x90,0x01,0xa0,0x00,0x00,0x00,0x14,0x00,
+		0x0d,0x00,0x17,0x00,0x00,0x00,0x00,0x64,
+		0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,
+		0x01,0x01,0x01,0x00,0x00,0x00,0x00,0x00"
+}

tools/topology/topology2/include/pipelines/cavs/dai-copier-eqiir-gain-module-copier-capture.conf

@@ -109,14 +109,6 @@ Class.Pipeline."dai-copier-eqiir-gain-module-copier-capture" {
 					out_ch_map	$CHANNEL_MAP_3_POINT_1
 				}
 			]
-
-			Object.Control.bytes."1" {
-				IncludeByKey.DMIC0_DAI_EQIIR {
-					"passthrough"		"include/components/eqiir/passthrough.conf"
-					"highpass_40hz_0db"	"include/components/eqiir/highpass_40hz_0db_48khz.conf"
-					"highpass_40hz_20db"	"include/components/eqiir/highpass_40hz_20db_48khz.conf"
-				}
-			}
 		}
 
 		gain."1" {

tools/topology/topology2/platform/intel/dmic-default.conf

@@ -21,6 +21,7 @@ Define {
 	DMIC1_NAME	dmic16k
 	DMIC0_PCM_CAPS	"Passthrough Capture 11"
 	DMIC0_DAI_EQIIR			"highpass_40hz_0db"
+	DMIC1_DAI_EQIIR			"highpass_100hz_20db"
 	DMIC1_HOST_PIPELINE_ID		18
 	DMIC1_DAI_PIPELINE_ID		19
 	WOV_PIPELINE_ID			20

tools/topology/topology2/platform/intel/dmic-generic.conf

@@ -285,6 +285,11 @@ IncludeByKey.PASSTHROUGH {
 				Object.Widget.eqiir.1 {
 					Object.Control.bytes."1" {
 						name 'DMIC0 Capture IIR Eq'
+						IncludeByKey.DMIC0_DAI_EQIIR {
+							"passthrough"		"include/components/eqiir/passthrough.conf"
+							"highpass_40hz_0db"	"include/components/eqiir/highpass_40hz_0db_48khz.conf"
+							"highpass_40hz_20db"	"include/components/eqiir/highpass_40hz_20db_48khz.conf"
+						}
 					}
 					num_input_audio_formats	    1
 					num_output_audio_formats    1
@@ -724,4 +729,5 @@ Object.PCM.pcm [
 
 IncludeByKey.DMIC1_ENABLE {
 	"passthrough"   "platform/intel/dmic1-passthrough.conf"
+        "mfcc"          "platform/intel/dmic1-mfcc.conf"
 }